CPU performance bottleneck

     Intel mentioned in its technical forum that due to the delay in obtaining a proper solution to the leakage current and heat dissipation problems when the line width reaches the nanometer scale, it has temporarily abandoned the development of CPUs with higher main frequency and turned to the development of dual core or even multi-core CPUs. Even so, the heat dissipation problem is only temporarily alleviated, the heat generation of a single CPU will continue to increase, and the heat dissipation will face greater challenges.

   Fig. A is a schematic diagram of heat dissipation. The heat is generated by the die of the processor and is directly transmitted to the heat sink through the metal layer welding layer. There is no low thermal conductivity material in the middle, which significantly improves its thermal conductivity. Fig. B is an optical micrograph of the CPU cross-section. Each layer is in close contact and reduces the thermal resistance. Fig. C and D are pictures of the CPU directly welded to the notebook heat sink. Fig. e is a picture of installing the welded CPU into the notebook to directly run the application.

   Due to imperfections in surface topography, a thermal interface material (TIM1) is typically used to reduce the contact resistance between silicon die and lid, to fill the gaps between the two imperfect surfaces. Under high magnification, even polished surfaces exhibit surface roughness sufficient for disruption of heat flow across the contacting interfaces.

   Polymer based materials are commonly used as TIM1 for heat conduction across the interface. Polymer TIM comprises of conductive filler particles in a polymer matrix. Since most polymer matrix has very poor thermal conductivity, the heat conduction is mainly through the intimate contact between the filler particles，Therefore, it is easy to understand that why a 100% metal or solder TIM has much higher thermal conductivity than a polymer base TIM.

     We present a welding integrated cooling structure combining heat sink and a single-crystalline silicon CPU die, produced with the need for low room temperature CPU metallization firstly and welding to the heat sink subsequently.

    The layer has to absorb strain resulting from the mismatch of coefficients of thermal expansion (CTE) of the die, substrate and the integrated heat sink during temperature cycling. Figure a and b is microstructure of metallization surface , figure c is the cross-section between silicon die and metallization layer, the porous structure may release the thermal strain during temperature cycling.

      It can be seen from the demand and desire of CPU direct welding heat sink that this technology has reached a consensus in society to a certain extent and has become an urgent problem to be solved.