Power supply cooling to optimize power performance and cost
When the heat of the product system increases, the power consumption of the system will increase exponentially. In this way, when designing the power supply system, a solution with a larger current will be selected, and this will inevitably lead to an increase in cost. To a certain extent, the cost will increase exponentially.
Thermal simulation is an important part of developing power products and providing product material guidelines. Optimizing the size of the module is the development trend of terminal equipment design, which brings about the conversion of heat dissipation management from the metal heat sink to the PCB copper layer. Some modules today use lower switching frequencies for switch-mode power supplies and large passive components. For the voltage conversion and quiescent current driving the internal circuit, the efficiency of the linear regulator is relatively low.
As the functions become more abundant, the performance becomes higher and higher, and the device design becomes increasingly compact. At this time, IC-level and system-level heat dissipation simulation becomes very important.
The working environment temperature of some applications is 70 to 125°C, and the temperature of some die-size automotive applications is even as high as 140°C. For these applications, the uninterrupted operation of the system is very important. When optimizing electronic designs, accurate thermal analysis under transient and static worst-case scenarios for the above two types of applications is becoming increasingly important.
1. Thermal Management
The difficulty of heat dissipation management is to reduce the package size while achieving higher heat dissipation performance, higher working environment temperature and lower copper heat dissipation layer budget. High packaging efficiency will result in a higher concentration of heat-generating components, resulting in extremely high heat fluxes at the IC level and package level.
The factors that need to be considered in the system include other printed circuit board power devices that may affect the analysis device temperature, system space, and airflow design/restrictions. The three levels of thermal management to be considered are: package, circuit board and system
Typical heat transfer path in IC package
Low cost, small form factor, module integration and package reliability are several aspects that need to be considered when choosing a package. As cost becomes a key consideration, heat dissipation enhancement packages based on lead frames are becoming increasingly popular.
This kind of package includes embedded heat sink or exposed pad and soaking chip type package, which is designed to improve heat dissipation performance. In some surface mount packages, some dedicated lead frames weld several leads on each side of the package to function as a heat spreader. This method provides a better heat dissipation path for the heat transfer of the die pad.
2. IC and package heat dissipation simulation
Thermal analysis requires detailed and accurate silicon chip product models and housing thermal properties. Semiconductor suppliers provide silicon chip IC heat dissipation mechanical properties and packaging, while equipment manufacturers provide information about module materials. Product users provide information on the use environment.
This analysis helps IC designers optimize the size of the power FET for the worst-case power consumption in transient and static operating modes. In many power electronic ICs, the power FET occupies a considerable part of the die area. Thermal analysis helps designers optimize their designs.
The selected package generally exposes part of the metal to provide a low heat dissipation impedance path from the silicon chip to the heat sink. The key parameters required by the model are as follows:
Silicon chip size aspect ratio and chip thickness.
The area and location of the power device, and any auxiliary drive circuits that generate heat.
The thickness of the power supply structure (the dispersion in the silicon chip).
The area and thickness of the die connection where the silicon chip is connected to the exposed metal pads or metal bumps. May include the percentage of the air gap of the die connection material.
The area and thickness of the junction of exposed metal pads or metal bumps.
Use the mold material and the package size of the connection lead.
The thermal conductivity properties of each material used in the model must be provided. This data input also includes temperature-dependent changes in all heat conduction properties, which specifically include:
Silicon chip thermal conductivity
Die connection, thermal conductivity of mold material
Thermal conductivity at the junction of metal pads or metal bumps.
Interaction between package product and PCB
One of the most important parameters of heat dissipation simulation is to determine the thermal resistance from the pad to the heat sink material. The methods for determining the thermal resistance are as follows:
Multi-layer FR4 circuit board (commonly used are four-layer and six-layer circuit boards)
Single-ended circuit board
Top and bottom circuit boards
The heat dissipation and thermal resistance paths vary according to different implementation methods:
Connect to the heat dissipation pad of the internal heat sink panel or the heat dissipation hole at the junction of the protrusion. Use solder to connect the exposed thermal pad or bump connection to the top layer of the PCB.
An opening on the PCB below the exposed thermal pad or bump connection, which can be connected to the extended heat sink base connected to the module's metal casing.
Use metal screws to connect the heat sink to the heat sink on the top or bottom copper layer of the PCB of the metal shell. Use solder to connect the exposed thermal pad or bump connection to the top layer of the PCB.
In addition, the weight or thickness of the copper plating used on each layer of the PCB is very critical. In terms of thermal resistance analysis, the layers connected to the exposed pads or bumps are directly affected by this parameter. Generally speaking, these are the top, heat sink, and bottom layers in a multilayer printed circuit board.
In most applications, it can be a two-ounce copper (2 ounce copper = 2.8 mils or 71 µm) outer layer, and a 1-ounce copper (1 ounce copper = 1.4 mils or 35 µm) inner layer, or all All are 1 ounce heavy copper clad layer. In consumer electronics applications, some applications even use 0.5 ounces of copper (0.5 ounces of copper = 0.7 mils or 18 µm) layer.
